=================================================================== RCS file: /home/cvs/OpenXM_contrib/gc/Attic/mach_dep.c,v retrieving revision 1.1 retrieving revision 1.1.1.2 diff -u -p -r1.1 -r1.1.1.2 --- OpenXM_contrib/gc/Attic/mach_dep.c 1999/11/27 10:58:32 1.1 +++ OpenXM_contrib/gc/Attic/mach_dep.c 2000/04/14 11:07:57 1.1.1.2 @@ -20,7 +20,11 @@ # define _longjmp(b,v) longjmp(b,v) # endif # ifdef AMIGA -# include +# ifndef __GNUC__ +# include +# else +# include +# endif # endif #if defined(__MWERKS__) && !defined(POWERPC) @@ -58,6 +62,12 @@ asm static void PushMacRegisters() #endif /* __MWERKS__ */ +# if defined(SPARC) || defined(IA64) + /* Value returned from register flushing routine; either sp (SPARC) */ + /* or ar.bsp (IA64) */ + word GC_save_regs_ret_val; +# endif + /* Routine to mark from registers that are preserved by the C compiler. */ /* This must be ported to every new architecture. There is a generic */ /* version at the end, that is likely, but not guaranteed to work */ @@ -126,9 +136,28 @@ void GC_push_regs() asm("addq.w &0x4,%sp"); /* put stack back where it was */ # endif /* M68K HP */ -# ifdef AMIGA - /* AMIGA - could be replaced by generic code */ - /* a0, a1, d0 and d1 are caller save */ +# if defined(M68K) && defined(AMIGA) + /* AMIGA - could be replaced by generic code */ + /* a0, a1, d0 and d1 are caller save */ + +# ifdef __GNUC__ + asm("subq.w &0x4,%sp"); /* allocate word on top of stack */ + + asm("mov.l %a2,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %a3,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %a4,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %a5,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %a6,(%sp)"); asm("jsr _GC_push_one"); + /* Skip frame pointer and stack pointer */ + asm("mov.l %d2,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %d3,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %d4,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %d5,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %d6,(%sp)"); asm("jsr _GC_push_one"); + asm("mov.l %d7,(%sp)"); asm("jsr _GC_push_one"); + + asm("addq.w &0x4,%sp"); /* put stack back where it was */ +# else /* !__GNUC__ */ GC_push_one(getreg(REG_A2)); GC_push_one(getreg(REG_A3)); GC_push_one(getreg(REG_A4)); @@ -141,7 +170,8 @@ void GC_push_regs() GC_push_one(getreg(REG_D5)); GC_push_one(getreg(REG_D6)); GC_push_one(getreg(REG_D7)); -# endif +# endif /* !__GNUC__ */ +# endif /* AMIGA */ # if defined(M68K) && defined(MACOS) # if defined(THINK_C) @@ -244,12 +274,12 @@ void GC_push_regs() asm ("movd r7, tos"); asm ("bsr ?_GC_push_one"); asm ("adjspb $-4"); # endif -# ifdef SPARC +# if defined(SPARC) || defined(IA64) { word GC_save_regs_in_stack(); /* generic code will not work */ - (void)GC_save_regs_in_stack(); + GC_save_regs_ret_val = GC_save_regs_in_stack(); } # endif @@ -309,12 +339,22 @@ void GC_push_regs() # endif /* !__GNUC__ */ # endif /* M68K/SYSV */ +# if defined(PJ) + { + register int * sp asm ("optop"); + extern int *__libc_stack_end; + GC_push_all_stack (sp, __libc_stack_end); + } +# endif + /* other machines... */ # if !(defined M68K) && !(defined VAX) && !(defined RT) # if !(defined SPARC) && !(defined I386) && !(defined NS32K) -# if !defined(POWERPC) && !defined(UTS4) +# if !defined(POWERPC) && !defined(UTS4) && !defined(IA64) +# if !defined(PJ) --> bad news <-- +# endif # endif # endif # endif @@ -374,6 +414,27 @@ ptr_t cold_gc_frame; # endif # endif +/* On IA64, we also need to flush register windows. But they end */ +/* up on the other side of the stack segment. */ +/* Returns the backing store pointer for the register stack. */ +# ifdef IA64 + asm(" .text"); + asm(" .psr abi64"); + asm(" .psr lsb"); + asm(" .lsb"); + asm(""); + asm(" .text"); + asm(" .align 16"); + asm(" .global GC_save_regs_in_stack"); + asm(" .proc GC_save_regs_in_stack"); + asm("GC_save_regs_in_stack:"); + asm(" .body"); + asm(" flushrs"); + asm(" ;;"); + asm(" mov r8=ar.bsp"); + asm(" br.ret.sptk.few rp"); + asm(" .endp GC_save_regs_in_stack"); +# endif /* GC_clear_stack_inner(arg, limit) clears stack area up to limit and */ /* returns arg. Stack clearing is crucial on SPARC, so we supply */