Annotation of OpenXM_contrib/gmp/mpn/hppa/hppa1_1/mul_1.s, Revision 1.1.1.2
1.1.1.2 ! maekawa 1: ; HP-PA-1.1 __gmpn_mul_1 -- Multiply a limb vector with a limb and store
1.1 maekawa 2: ; the result in a second limb vector.
3:
1.1.1.2 ! maekawa 4: ; Copyright (C) 1992, 1993, 1994, 2000 Free Software Foundation, Inc.
1.1 maekawa 5:
6: ; This file is part of the GNU MP Library.
7:
8: ; The GNU MP Library is free software; you can redistribute it and/or modify
1.1.1.2 ! maekawa 9: ; it under the terms of the GNU Lesser General Public License as published by
! 10: ; the Free Software Foundation; either version 2.1 of the License, or (at your
1.1 maekawa 11: ; option) any later version.
12:
13: ; The GNU MP Library is distributed in the hope that it will be useful, but
14: ; WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
1.1.1.2 ! maekawa 15: ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
1.1 maekawa 16: ; License for more details.
17:
1.1.1.2 ! maekawa 18: ; You should have received a copy of the GNU Lesser General Public License
1.1 maekawa 19: ; along with the GNU MP Library; see the file COPYING.LIB. If not, write to
20: ; the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
21: ; MA 02111-1307, USA.
22:
23:
24: ; INPUT PARAMETERS
25: ; res_ptr r26
26: ; s1_ptr r25
27: ; size r24
28: ; s2_limb r23
29:
30: ; This runs at 9 cycles/limb on a PA7000. With the used instructions, it can
31: ; not become faster due to data cache contention after a store. On the
32: ; PA7100 it runs at 7 cycles/limb, and that can not be improved either, since
33: ; only the xmpyu does not need the integer pipeline, so the only dual-issue
34: ; we will get are addc+xmpyu. Unrolling would not help either CPU.
35:
36: ; We could use fldds to read two limbs at a time from the S1 array, and that
37: ; could bring down the times to 8.5 and 6.5 cycles/limb for the PA7000 and
38: ; PA7100, respectively. We don't do that since it does not seem worth the
39: ; (alignment) troubles...
40:
41: ; At least the PA7100 is rumored to be able to deal with cache-misses
42: ; without stalling instruction issue. If this is true, and the cache is
43: ; actually also lockup-free, we should use a deeper software pipeline, and
44: ; load from S1 very early! (The loads and stores to -12(sp) will surely be
45: ; in the cache.)
46:
47: .code
1.1.1.2 ! maekawa 48: .export __gmpn_mul_1
! 49: __gmpn_mul_1
1.1 maekawa 50: .proc
51: .callinfo frame=64,no_calls
52: .entry
53:
54: ldo 64(%r30),%r30
55: fldws,ma 4(%r25),%fr5
56: stw %r23,-16(%r30) ; move s2_limb ...
57: addib,= -1,%r24,L$just_one_limb
58: fldws -16(%r30),%fr4 ; ... into fr4
59: add %r0,%r0,%r0 ; clear carry
60: xmpyu %fr4,%fr5,%fr6
61: fldws,ma 4(%r25),%fr7
62: fstds %fr6,-16(%r30)
63: xmpyu %fr4,%fr7,%fr8
64: ldw -12(%r30),%r19 ; least significant limb in product
65: ldw -16(%r30),%r28
66:
67: fstds %fr8,-16(%r30)
68: addib,= -1,%r24,L$end
69: ldw -12(%r30),%r1
70:
71: ; Main loop
72: L$loop fldws,ma 4(%r25),%fr5
73: stws,ma %r19,4(%r26)
74: addc %r28,%r1,%r19
75: xmpyu %fr4,%fr5,%fr6
76: ldw -16(%r30),%r28
77: fstds %fr6,-16(%r30)
78: addib,<> -1,%r24,L$loop
79: ldw -12(%r30),%r1
80:
81: L$end stws,ma %r19,4(%r26)
82: addc %r28,%r1,%r19
83: ldw -16(%r30),%r28
84: stws,ma %r19,4(%r26)
85: addc %r0,%r28,%r28
86: bv 0(%r2)
87: ldo -64(%r30),%r30
88:
89: L$just_one_limb
90: xmpyu %fr4,%fr5,%fr6
91: fstds %fr6,-16(%r30)
92: ldw -16(%r30),%r28
93: ldo -64(%r30),%r30
94: bv 0(%r2)
95: fstws %fr6R,0(%r26)
96:
97: .exit
98: .procend
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