Annotation of OpenXM_contrib/gmp/mpn/powerpc32/README, Revision 1.1.1.1
1.1 ohara 1: Copyright 2002 Free Software Foundation, Inc.
2:
3: This file is part of the GNU MP Library.
4:
5: The GNU MP Library is free software; you can redistribute it and/or modify
6: it under the terms of the GNU Lesser General Public License as published by
7: the Free Software Foundation; either version 2.1 of the License, or (at your
8: option) any later version.
9:
10: The GNU MP Library is distributed in the hope that it will be useful, but
11: WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12: or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
13: License for more details.
14:
15: You should have received a copy of the GNU Lesser General Public License
16: along with the GNU MP Library; see the file COPYING.LIB. If not, write to
17: the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
18: 02111-1307, USA.
19:
20:
21:
22:
23:
24: POWERPC 32-BIT MPN SUBROUTINES
25:
26:
27: This directory contains mpn functions for various 32-bit PowerPC chips.
28:
29:
30: CODE ORGANIZATION
31:
32: powerpc generic, 604, 604e
33: powerpc/750 740, 750, 7400
34:
35:
36: The top-level powerpc directory is currently mostly aimed at 604/604e but
37: should be reasonable on all powerpcs.
38:
39:
40:
41: STATUS
42:
43: The code is quite well optimized for the 604e, other chips have had less
44: attention.
45:
46: Altivec SIMD available in 7400 might hold some promise, but unfortunately
47: GMP only guarantees 32-bit data alignment, so there's lots of fiddling
48: around with partial operations at the start and end of limb vectors. A
49: 128-bit limb would be a novel idea, but is unlikely to be practical, since
50: it would have to work with ordinary +, -, * etc in the C code.
51:
52:
53:
54: REGISTER NAMES
55:
56: The normal powerpc convention is to give registers as plain numbers, like
57: "mtctr 6", but on Apple MacOS X (powerpc*-*-rhapsody* and
58: powerpc*-*-darwin*) the assembler demands an "r" like "mtctr r6". Note
59: however when register 0 in an instruction means a literal zero the "r" is
60: omitted, for instance "lwzx r6,0,r7".
61:
62: The GMP code uses the "r" forms, powerpc-defs.m4 transforms them to plain
63: numbers according to what GMP_ASM_POWERPC_R_REGISTERS finds is needed.
64:
65:
66:
67:
68: REFERENCES
69:
70: PowerPC Microprocessor Family: The Programming Environments for 32-bit
71: Microprocessors, IBM document G522-0290-01, 2000.
72:
73: PowerPC 604e RISC Microprocessor User's Manual with Supplement for PowerPC
74: 604 Microprocessor, IBM document G552-0330-00, Motorola document
75: MPC604EUM/AD, 1998.
76:
77: MPC7400 RISC Microprocessor User's Manual, Motorola document MPC7400UM/D,
78: rev 0, 3/2000.
79:
80: The above are available online from
81:
82: http://chips.ibm.com/techlib/products/powerpc/manuals
83: http://www.mot.com/PowerPC
84:
85:
86:
87: ----------------
88: Local variables:
89: mode: text
90: fill-column: 76
91: End:
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