Annotation of OpenXM_contrib/gmp/mpn/x86/k7/mmx/com_n.asm, Revision 1.1.1.1
1.1 ohara 1: dnl AMD Athlon mpn_com_n -- mpn bitwise one's complement.
2:
3: dnl Copyright 2002 Free Software Foundation, Inc.
4: dnl
5: dnl This file is part of the GNU MP Library.
6: dnl
7: dnl The GNU MP Library is free software; you can redistribute it and/or
8: dnl modify it under the terms of the GNU Lesser General Public License as
9: dnl published by the Free Software Foundation; either version 2.1 of the
10: dnl License, or (at your option) any later version.
11: dnl
12: dnl The GNU MP Library is distributed in the hope that it will be useful,
13: dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
14: dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15: dnl Lesser General Public License for more details.
16: dnl
17: dnl You should have received a copy of the GNU Lesser General Public
18: dnl License along with the GNU MP Library; see the file COPYING.LIB. If
19: dnl not, write to the Free Software Foundation, Inc., 59 Temple Place -
20: dnl Suite 330, Boston, MA 02111-1307, USA.
21:
22: include(`../config.m4')
23:
24:
25: C K7: 1.0 cycles/limb
26:
27:
28: C void mpn_com_n (mp_ptr dst, mp_srcptr src, mp_size_t size);
29: C
30: C The loop form below is necessary for the claimed speed. It needs to be
31: C aligned to a 16 byte boundary and only 16 bytes long. Maybe that's so it
32: C fits in a BTB entry. The adjustments to %eax and %edx avoid offsets on
33: C the movq's and achieve the necessary size.
34: C
35: C If both src and dst are 4mod8, the loop runs at 1.5 c/l. So long as one
36: C of the two is 0mod8, it runs at 1.0 c/l. On that basis dst is checked
37: C (offset by the size, as per the loop addressing) and one high limb
38: C processed separately to get alignment.
39: C
40: C The padding for the nails case is unattractive, but shouldn't cost any
41: C cycles. Explicit .byte's guarantee the desired instructions, at a point
42: C where we're probably stalled waiting for loads anyway.
43: C
44: C Enhancements:
45: C
46: C The combination load/pxor/store might be able to be unrolled to approach
47: C 0.5 c/l if desired.
48:
49: defframe(PARAM_SIZE,12)
50: defframe(PARAM_SRC, 8)
51: defframe(PARAM_DST, 4)
52:
53: TEXT
54: ALIGN(16)
55:
56: PROLOGUE(mpn_com_n)
57: deflit(`FRAME',0)
58:
59: movl PARAM_DST, %edx
60: movl PARAM_SIZE, %ecx
61: pcmpeqd %mm7, %mm7
62:
63: leal (%edx,%ecx,4), %eax
64: andl $4, %eax
65: ifelse(GMP_NAIL_BITS,0,,
66: ` psrld $GMP_NAIL_BITS, %mm7') C GMP_NUMB_MASK
67:
68: movl PARAM_SRC, %eax
69: movd -4(%eax,%ecx,4), %mm0 C src high limb
70:
71: ifelse(GMP_NAIL_BITS,0,,
72: ` C padding for alignment below
73: .byte 0x8d, 0xb6, 0x00, 0x00, 0x00, 0x00 C lea 0(%esi),%esi
74: .byte 0x8d, 0xbf, 0x00, 0x00, 0x00, 0x00 C lea 0(%edi),%edi
75: ')
76:
77: jz L(aligned)
78:
79: pxor %mm7, %mm0
80: movd %mm0, -4(%edx,%ecx,4) C dst high limb
81: decl %ecx
82: jz L(done)
83: L(aligned):
84:
85: addl $4, %eax
86: addl $4, %edx
87: decl %ecx
88: jz L(one)
89:
90: C offset 0x30 for no nails, or 0x40 for nails
91: ALIGN(16)
92: L(top):
93: C eax src
94: C ebx
95: C ecx counter
96: C edx dst
97:
98: subl $2, %ecx
99: movq (%eax,%ecx,4), %mm0
100: pxor %mm7, %mm0
101: movq %mm0, (%edx,%ecx,4)
102: jg L(top)
103:
104: jnz L(done) C if size even
105:
106: L(one):
107: movd -4(%eax), %mm0 C src low limb
108: pxor %mm7, %mm0
109: movd %mm0, -4(%edx) C dst low limb
110:
111: L(done):
112: emms
113:
114: ret
115:
116: EPILOGUE()
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