Annotation of OpenXM_contrib2/asir2000/builtin/list.c, Revision 1.7
1.2 noro 1: /*
2: * Copyright (c) 1994-2000 FUJITSU LABORATORIES LIMITED
3: * All rights reserved.
4: *
5: * FUJITSU LABORATORIES LIMITED ("FLL") hereby grants you a limited,
6: * non-exclusive and royalty-free license to use, copy, modify and
7: * redistribute, solely for non-commercial and non-profit purposes, the
8: * computer program, "Risa/Asir" ("SOFTWARE"), subject to the terms and
9: * conditions of this Agreement. For the avoidance of doubt, you acquire
10: * only a limited right to use the SOFTWARE hereunder, and FLL or any
11: * third party developer retains all rights, including but not limited to
12: * copyrights, in and to the SOFTWARE.
13: *
14: * (1) FLL does not grant you a license in any way for commercial
15: * purposes. You may use the SOFTWARE only for non-commercial and
16: * non-profit purposes only, such as academic, research and internal
17: * business use.
18: * (2) The SOFTWARE is protected by the Copyright Law of Japan and
19: * international copyright treaties. If you make copies of the SOFTWARE,
20: * with or without modification, as permitted hereunder, you shall affix
21: * to all such copies of the SOFTWARE the above copyright notice.
22: * (3) An explicit reference to this SOFTWARE and its copyright owner
23: * shall be made on your publication or presentation in any form of the
24: * results obtained by use of the SOFTWARE.
25: * (4) In the event that you modify the SOFTWARE, you shall notify FLL by
1.3 noro 26: * e-mail at risa-admin@sec.flab.fujitsu.co.jp of the detailed specification
1.2 noro 27: * for such modification or the source code of the modified part of the
28: * SOFTWARE.
29: *
30: * THE SOFTWARE IS PROVIDED AS IS WITHOUT ANY WARRANTY OF ANY KIND. FLL
31: * MAKES ABSOLUTELY NO WARRANTIES, EXPRESSED, IMPLIED OR STATUTORY, AND
32: * EXPRESSLY DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS
33: * FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF THIRD PARTIES'
34: * RIGHTS. NO FLL DEALER, AGENT, EMPLOYEES IS AUTHORIZED TO MAKE ANY
35: * MODIFICATIONS, EXTENSIONS, OR ADDITIONS TO THIS WARRANTY.
36: * UNDER NO CIRCUMSTANCES AND UNDER NO LEGAL THEORY, TORT, CONTRACT,
37: * OR OTHERWISE, SHALL FLL BE LIABLE TO YOU OR ANY OTHER PERSON FOR ANY
38: * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL
39: * DAMAGES OF ANY CHARACTER, INCLUDING, WITHOUT LIMITATION, DAMAGES
40: * ARISING OUT OF OR RELATING TO THE SOFTWARE OR THIS AGREEMENT, DAMAGES
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44: * OF THE SOFTWARE HAS BEEN DEVELOPED BY A THIRD PARTY, THE THIRD PARTY
45: * DEVELOPER SHALL HAVE NO LIABILITY IN CONNECTION WITH THE USE,
46: * PERFORMANCE OR NON-PERFORMANCE OF THE SOFTWARE.
47: *
1.7 ! ohara 48: * $OpenXM: OpenXM_contrib2/asir2000/builtin/list.c,v 1.6 2003/01/20 17:44:51 saito Exp $
1.2 noro 49: */
1.1 noro 50: #include "ca.h"
51: #include "parse.h"
52:
1.6 saito 53: void Pcar(), Pcdr(), Pcons(), Pappend(), Preverse(), Plength();
54: void Pnconc(), Preplcd(), Preplca();
1.1 noro 55:
56: struct ftab list_tab[] = {
57: {"car",Pcar,1},
58: {"cdr",Pcdr,1},
59: {"cons",Pcons,2},
60: {"append",Pappend,2},
61: {"reverse",Preverse,1},
62: {"length",Plength,1},
1.6 saito 63: {"nconc",Pnconc,2},
64: {"replcd",Preplcd,2},
65: {"replca",Preplca,2},
1.1 noro 66: {0,0,0},
67: };
68:
69: void Pcar(arg,rp)
70: NODE arg;
71: pointer *rp;
72: {
73: asir_assert(ARG0(arg),O_LIST,"car");
74: if ( !BDY((LIST)ARG0(arg)) )
75: *rp = ARG0(arg);
76: else
77: *rp = (pointer)BDY(BDY((LIST)ARG0(arg)));
78: }
79:
80: void Pcdr(arg,rp)
81: NODE arg;
82: LIST *rp;
83: {
84: asir_assert(ARG0(arg),O_LIST,"cdr");
85: if ( !BDY((LIST)ARG0(arg)) )
86: *rp = (LIST)ARG0(arg);
87: else
88: MKLIST(*rp,NEXT(BDY((LIST)ARG0(arg))));
89: }
90:
91: void Pcons(arg,rp)
92: NODE arg;
93: LIST *rp;
94: {
95: NODE t;
96:
97: asir_assert(ARG1(arg),O_LIST,"cons");
98: MKNODE(t,ARG0(arg),BDY((LIST)ARG1(arg))); MKLIST(*rp,t);
99: }
100:
101: void Pappend(arg,rp)
102: NODE arg;
103: LIST *rp;
104: {
105: NODE t,t0,n;
106:
107: asir_assert(ARG0(arg),O_LIST,"append");
108: asir_assert(ARG1(arg),O_LIST,"append");
109: if ( !(n = BDY((LIST)ARG0(arg))) )
110: *rp = (LIST)ARG1(arg);
111: else {
112: for ( t0 = 0; n; n = NEXT(n) ) {
113: NEXTNODE(t0,t); BDY(t) = BDY(n);
114: }
115: NEXT(t) = BDY((LIST)ARG1(arg));
116: MKLIST(*rp,t0);
1.4 saito 117: }
118: }
119:
1.1 noro 120: void Preverse(arg,rp)
121: NODE arg;
122: LIST *rp;
123: {
124: NODE t,t1,n;
125:
126: asir_assert(ARG0(arg),O_LIST,"reverse");
127: if ( !(n = BDY((LIST)ARG0(arg))) )
128: *rp = (LIST)ARG0(arg);
129: else {
130: for ( t = 0; n; n = NEXT(n) ) {
131: MKNODE(t1,BDY(n),t); t = t1;
132: }
133: MKLIST(*rp,t);
134: }
135: }
136:
1.7 ! ohara 137: #if 0
1.1 noro 138: void Plength(arg,rp)
139: NODE arg;
140: Q *rp;
141: {
142: NODE n;
143: int i;
144:
145: asir_assert(ARG0(arg),O_LIST,"length");
146: n = BDY((LIST)ARG0(arg));
147: for ( i = 0; n; i++, n = NEXT(n) );
148: STOQ(i,*rp);
1.7 ! ohara 149: }
! 150: #endif
! 151:
! 152: void Plength(arg,rp)
! 153: NODE arg;
! 154: Q *rp;
! 155: {
! 156: NODE n;
! 157: int i;
! 158:
! 159: switch (OID(ARG0(arg))) {
! 160: case O_VECT:
! 161: i = ((VECT)ARG0(arg))->len;
! 162: break;
! 163: case O_LIST:
! 164: n = BDY((LIST)ARG0(arg));
! 165: for ( i = 0; n; i++, n = NEXT(n) );
! 166: break;
! 167: default:
! 168: error("length : invalid argument"); break;
! 169: }
! 170: STOQ(i,*rp);
1.6 saito 171: }
172:
173: void Pnconc(arg,rp)
174: NODE arg;
175: LIST *rp;
176: {
177: NODE a1,a2,n;
178:
179: asir_assert(ARG0(arg),O_LIST,"nconc");
180: asir_assert(ARG1(arg),O_LIST,"nconc");
181: a1 = BDY((LIST)ARG0(arg));
182: if ( !a1 )
183: *rp = (LIST)ARG1(arg);
184: else {
185: for ( n = a1; n; n = NEXT(n) ) {
186: a2 = n;
187: }
188: NEXT(a2) = BDY((LIST)ARG1(arg));
189: *rp = (LIST)ARG0(arg);
190: }
191: }
192:
193: void Preplcd(arg,rp)
194: NODE arg;
195: LIST *rp;
196: {
197: NODE a0,a1;
198:
199: asir_assert(ARG0(arg),O_LIST,"replcd");
200: asir_assert(ARG1(arg),O_LIST,"replcd");
201: a0 = BDY((LIST)ARG0(arg));
202: if ( !a0 )
203: *rp = (LIST)ARG0(arg);
204: else {
205: NEXT(a0) = BDY((LIST)ARG1(arg));
206: *rp = (LIST)ARG0(arg);
207: }
208: }
209:
210: void Preplca(arg,rp)
211: NODE arg;
212: LIST *rp;
213: {
214: NODE n;
215:
216: asir_assert(ARG0(arg),O_LIST,"replca");
217: if ( !(n = BDY((LIST)ARG0(arg)) ) )
218: *rp = (LIST)ARG0(arg);
219: else {
220: BDY(BDY((LIST)ARG0(arg))) = (LIST)ARG1(arg);
221: *rp = (LIST)ARG0(arg);
222: }
1.1 noro 223: }
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