Annotation of OpenXM_contrib2/asir2000/include/inline.h, Revision 1.2
1.2 ! noro 1: /* $OpenXM: OpenXM_contrib2/asir2000/include/inline.h,v 1.1.1.1 1999/12/03 07:39:11 noro Exp $ */
1.1 noro 2: #define DMB(base,a1,a2,u,l) (l)=dmb(base,a1,a2,&(u));
3: #define DMAB(base,a1,a2,a3,u,l) (l)=dmab(base,a1,a2,a3,&(u));
4: #define DMAR(a1,a2,a3,d,r) (r)=dmar(a1,a2,a3,d);
5:
6: #define DM27(a1,a2,u,l) (l)=dm_27(a1,a2,&(u));
7: #define DMA27(a1,a2,a3,u,l) (l)=dma_27(a1,a2,a3,&(u));
8: #define DSAB27(base,a1,a2,u,l) (l)=dmab(base,a1,BASE27,a2,&(u));
9:
10: #if defined(__GNUC__) || defined(__alpha) || defined(mips)
11: #define DM(a1,a2,u,l)\
12: {UL _t;\
13: _t=(UL)(a1)*(UL)(a2);\
14: (u)=(unsigned int)(_t>>BSH);\
15: (l)=(unsigned int)(_t&BMASK);}
16:
17: #define DMA(a1,a2,a3,u,l)\
18: {UL _t;\
19: _t=(UL)(a1)*(UL)(a2)+(UL)(a3);\
20: (u)=(unsigned int)(_t>>BSH);\
21: (l)=(unsigned int)(_t&BMASK);}
22:
23: #define DMA2(a1,a2,a3,a4,u,l)\
24: {UL _t;\
25: _t=(UL)(a1)*(UL)(a2)+(UL)(a3)+(UL)(a4);\
26: (u)=(unsigned int)(_t>>BSH);\
27: (l)=(unsigned int)(_t&BMASK);}
28:
29: #define DSAB(base,a1,a2,u,l)\
30: {UL _t;\
31: _t=(((UL)(a1))<<BSH)|((UL)(a2));\
32: (u)=(unsigned int)(_t/((UL)(base)));\
1.2 ! noro 33: (l)=(unsigned int)(_t-((UL)(base)*(UL)(u)));}
1.1 noro 34: #else
35: #define DM(a1,a2,u,l) (l)=dm(a1,a2,&(u));
36: #define DMA(a1,a2,a3,u,l) (l)=dma(a1,a2,a3,&(u));
37: #define DMA2(a1,a2,a3,a4,u,l) (l)=dma2(a1,a2,a3,a4,&(u));
38: #define DSAB(base,a1,a2,u,l) (l)=dsab(base,a1,a2,&(u));
39: #endif
40:
41: #define DQR(a,b,q,r)\
42: (q)=(a)/(b);\
43: (r)=(a)-(b)*(q);
44:
45: #if defined(sparc)
46: #undef DSAB
47: #undef DSAB27
48:
49: #define DSAB(base,a1,a2,u,l)\
50: {unsigned int _t;\
51: asm volatile("wr %0,%%g0,%%y" : : "r"(a1) );\
52: asm volatile("udiv %1,%2,%0" :"=r"(_t): "r"(a2),"r"(base) );\
53: (l)=(unsigned int)(a2)-(unsigned int)(_t)*(unsigned int)(base);\
54: (u)=(_t);}
55:
56: #define DSAB27(base,a1,a2,u,l) (l)=dsab_27(base,a1,a2,&(u));
57: #endif
58:
59: #if defined(VISUAL)
60:
61: #undef DM
62: #undef DMA
63: #undef DMA2
64: #undef DMB
65: #undef DMAB
66: #undef DMAR
67: #undef DSAB
68: #undef DM27
69: #undef DMA27
70: #undef DSAB27
71:
72: #define DSAB(base,a1,a2,u,l)\
73: {\
74: unsigned int _t1,_t2,_d;\
75: _t1=a1;_t2=a2;_d=base;\
76: __asm\
77: {\
78: __asm mov edx,_t1\
79: __asm mov eax,_t2\
80: __asm div _d\
81: __asm mov _t1,eax\
82: __asm mov _t2,edx\
83: }\
84: u=_t1;l=_t2;\
85: }
86:
87: #define DM(a1,a2,u,l)\
88: {\
89: unsigned int _t1,_t2;\
90: _t1=a1;_t2=a2;\
91: __asm\
92: {\
93: __asm mov eax,_t1\
94: __asm mul _t2\
95: __asm mov _t1,edx\
96: __asm mov _t2,eax\
97: }\
98: u=_t1;l=_t2;\
99: }
100:
101: #define DMA(a1,a2,a3,u,l)\
102: {\
103: unsigned int _t1,_t2,_t3;\
104: _t1=a1;_t2=a2;_t3=a3;\
105: __asm\
106: {\
107: __asm mov eax,_t1\
108: __asm mul _t2\
109: __asm add eax,_t3\
110: __asm adc edx,0\
111: __asm mov _t1,edx\
112: __asm mov _t2,eax\
113: }\
114: u=_t1;l=_t2;\
115: }
116:
117: #define DMA2(a1,a2,a3,a4,u,l)\
118: {\
119: unsigned int _t1,_t2,_t3,_t4;\
120: _t1=a1;_t2=a2;_t3=a3;_t4=a4;\
121: __asm\
122: {\
123: __asm mov eax,_t1\
124: __asm mul _t2\
125: __asm add eax,_t3\
126: __asm adc edx,0\
127: __asm add eax,_t4\
128: __asm adc edx,0\
129: __asm mov _t1,edx\
130: __asm mov _t2,eax\
131: }\
132: u=_t1;l=_t2;\
133: }
134:
135: #define DMB(base,a1,a2,u,l)\
136: {\
137: unsigned int _t1,_t2,_d;\
138: _t1=a1;_t2=a2;_d=base;\
139: __asm\
140: {\
141: __asm mov eax,_t1\
142: __asm mul _t2\
143: __asm div _d\
144: __asm mov _t1,eax\
145: __asm mov _t2,edx\
146: }\
147: u=_t1;l=_t2;\
148: }
149:
150: #define DMAB(base,a1,a2,a3,u,l)\
151: {\
152: unsigned int _t1,_t2,_t3,_d;\
153: _t1=a1;_t2=a2;_t3=a3;_d=base;\
154: __asm\
155: {\
156: __asm mov eax,_t1\
157: __asm mul _t2\
158: __asm add eax,_t3\
159: __asm adc edx,0\
160: __asm div _d\
161: __asm mov _t1,eax\
162: __asm mov _t2,edx\
163: }\
164: u=_t1;l=_t2;\
165: }
166:
167: #define DMAR(a1,a2,a3,d,r)\
168: {\
169: unsigned int _t1,_t2,_t3,_d;\
170: _t1=a1;_t2=a2;_t3=a3,_d=d;\
171: __asm\
172: {\
173: __asm mov eax,_t1\
174: __asm mul _t2\
175: __asm add eax,_t3\
176: __asm adc edx,0\
177: __asm div _d\
178: __asm mov _t1,edx\
179: }\
180: r=_t1;\
181: }
182:
183: #define DSAB27(base,a1,a2,u,l)\
184: {\
185: unsigned int _t1,_t2,_d;\
186: _t1=a1;_t2=a2;_d=base;\
187: __asm\
188: {\
189: __asm mov edx,_t1\
190: __asm mov eax,_t2\
191: __asm mov ecx,edx\
192: __asm shl ecx,27\
193: __asm or eax,ecx\
194: __asm shr edx,5\
195: __asm div _d\
196: __asm mov _t1,eax\
197: __asm mov _t2,edx\
198: }\
199: u=_t1;l=_t2;\
200: }
201:
202: #define DM27(a1,a2,u,l)\
203: {\
204: unsigned int _t1,_t2;\
205: _t1=a1;_t2=a2;\
206: __asm\
207: {\
208: __asm mov eax,_t1\
209: __asm mul _t2\
210: __asm shl edx,5\
211: __asm mov ecx,eax\
212: __asm shr ecx,27\
213: __asm or edx,ecx\
214: __asm and eax,134217727\
215: __asm mov _t1,edx\
216: __asm mov _t2,eax\
217: }\
218: u=_t1;l=_t2;\
219: }
220:
221: #define DMA27(a1,a2,a3,u,l)\
222: {\
223: unsigned int _t1,_t2,_t3;\
224: _t1=a1;_t2=a2;_t3=a3;\
225: __asm\
226: {\
227: __asm mov eax,_t1\
228: __asm mul _t2\
229: __asm add eax,_t3\
230: __asm adc edx,0\
231: __asm shl edx,5\
232: __asm mov ecx,eax\
233: __asm shr ecx,27\
234: __asm or edx,ecx\
235: __asm and eax,134217727\
236: __asm mov _t1,edx\
237: __asm mov _t2,eax\
238: }\
239: u=_t1;l=_t2;\
240: }
241: #endif
242:
243: #if !defined(VISUAL) && defined(i386) && (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__))
244:
245: #if 0
246: #undef DMA
247: #define DMA(a1,a2,a3,u,l)\
248: asm volatile("movl %0,%%eax" : : "m" (a1) : "ax");\
249: asm volatile("mull %0" : : "m" (a2) : "ax","dx");\
250: asm volatile("addl %0,%%eax" : : "m" (a3) : "ax" );\
251: asm volatile("adcl $0,%%edx" : : : "dx" );\
252: asm volatile("movl %%edx,%0" : "=m" (u) : : "ax","dx");\
253: asm volatile("movl %%eax,%0" : "=m" (l) : : "ax" );
254: #endif
255:
256: #undef DM
257: #undef DMB
258: #undef DMAB
259: #undef DMAR
260: #undef DSAB
261: #undef DM27
262: #undef DMA27
263:
264: #define DM27(a1,a2,u,l)\
265: asm volatile(" movl %2,%%eax; mull %3; shll $5,%%edx; movl %%eax,%%ecx; shrl $27,%%ecx; orl %%ecx,%%edx; andl $134217727,%%eax; movl %%edx,%0; movl %%eax,%1" :"=m"(u),"=m"(l) :"m"(a1),"m"(a2) :"ax","bx","cx","dx");
266:
267: #define DMA27(a1,a2,a3,u,l)\
268: asm volatile(" movl %2,%%eax; mull %3; addl %4,%%eax; adcl $0,%%edx; shll $5,%%edx; movl %%eax,%%ecx; shrl $27,%%ecx; orl %%ecx,%%edx; andl $134217727,%%eax; movl %%edx,%0; movl %%eax,%1" :"=m"(u),"=m"(l) :"m"(a1),"m"(a2),"m"(a3) :"ax","bx","cx","dx");
269:
270: #define DSAB(base,a1,a2,u,l)\
271: asm volatile(" movl %2,%%edx; movl %3,%%eax; divl %4; movl %%edx,%0; movl %%eax,%1" :"=m"(l),"=m"(u) :"m"(a1),"m"(a2),"m"(base) :"ax","dx");
272:
273: #define DM(a1,a2,u,l)\
274: asm volatile(" movl %2,%%eax; mull %3; movl %%edx,%0; movl %%eax,%1" :"=m"(u),"=m"(l) :"m"(a1),"m"(a2) :"ax","dx");
275:
276: #define DMB(base,a1,a2,u,l)\
277: asm volatile(" movl %2,%%eax;" mull %3;" divl %4;" movl %%edx,%0;" movl %%eax,%0" :"=m"(l),"=m"(u) :"m"(a1),"m"(a2),"m"(base) :"ax","dx");
278:
279: #define DMAB(base,a1,a2,a3,u,l)\
280: asm volatile("movl %2,%%eax; mull %3; addl %4,%%eax; adcl $0,%%edx; divl %5; movl %%edx,%0; movl %%eax,%1" :"=m"(l),"=m"(u) :"m"(a1),"m"(a2),"m"(a3),"m"(base) :"ax","dx");
281:
282: #define DMAR(a1,a2,a3,d,r)\
283: asm volatile("movl %1,%%eax; mull %2; addl %3,%%eax; adcl $0,%%edx; divl %4; movl %%edx,%0" :"=m"(r) :"m"(a1),"m"(a2),"m"(a3),"m"(d) :"ax","dx");
284: #endif
285:
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