Annotation of OpenXM_contrib2/asir2000/include/inline.h, Revision 1.5
1.3 noro 1: /*
2: * Copyright (c) 1994-2000 FUJITSU LABORATORIES LIMITED
3: * All rights reserved.
4: *
5: * FUJITSU LABORATORIES LIMITED ("FLL") hereby grants you a limited,
6: * non-exclusive and royalty-free license to use, copy, modify and
7: * redistribute, solely for non-commercial and non-profit purposes, the
8: * computer program, "Risa/Asir" ("SOFTWARE"), subject to the terms and
9: * conditions of this Agreement. For the avoidance of doubt, you acquire
10: * only a limited right to use the SOFTWARE hereunder, and FLL or any
11: * third party developer retains all rights, including but not limited to
12: * copyrights, in and to the SOFTWARE.
13: *
14: * (1) FLL does not grant you a license in any way for commercial
15: * purposes. You may use the SOFTWARE only for non-commercial and
16: * non-profit purposes only, such as academic, research and internal
17: * business use.
18: * (2) The SOFTWARE is protected by the Copyright Law of Japan and
19: * international copyright treaties. If you make copies of the SOFTWARE,
20: * with or without modification, as permitted hereunder, you shall affix
21: * to all such copies of the SOFTWARE the above copyright notice.
22: * (3) An explicit reference to this SOFTWARE and its copyright owner
23: * shall be made on your publication or presentation in any form of the
24: * results obtained by use of the SOFTWARE.
25: * (4) In the event that you modify the SOFTWARE, you shall notify FLL by
1.4 noro 26: * e-mail at risa-admin@sec.flab.fujitsu.co.jp of the detailed specification
1.3 noro 27: * for such modification or the source code of the modified part of the
28: * SOFTWARE.
29: *
30: * THE SOFTWARE IS PROVIDED AS IS WITHOUT ANY WARRANTY OF ANY KIND. FLL
31: * MAKES ABSOLUTELY NO WARRANTIES, EXPRESSED, IMPLIED OR STATUTORY, AND
32: * EXPRESSLY DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS
33: * FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF THIRD PARTIES'
34: * RIGHTS. NO FLL DEALER, AGENT, EMPLOYEES IS AUTHORIZED TO MAKE ANY
35: * MODIFICATIONS, EXTENSIONS, OR ADDITIONS TO THIS WARRANTY.
36: * UNDER NO CIRCUMSTANCES AND UNDER NO LEGAL THEORY, TORT, CONTRACT,
37: * OR OTHERWISE, SHALL FLL BE LIABLE TO YOU OR ANY OTHER PERSON FOR ANY
38: * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL
39: * DAMAGES OF ANY CHARACTER, INCLUDING, WITHOUT LIMITATION, DAMAGES
40: * ARISING OUT OF OR RELATING TO THE SOFTWARE OR THIS AGREEMENT, DAMAGES
41: * FOR LOSS OF GOODWILL, WORK STOPPAGE, OR LOSS OF DATA, OR FOR ANY
42: * DAMAGES, EVEN IF FLL SHALL HAVE BEEN INFORMED OF THE POSSIBILITY OF
43: * SUCH DAMAGES, OR FOR ANY CLAIM BY ANY OTHER PARTY. EVEN IF A PART
44: * OF THE SOFTWARE HAS BEEN DEVELOPED BY A THIRD PARTY, THE THIRD PARTY
45: * DEVELOPER SHALL HAVE NO LIABILITY IN CONNECTION WITH THE USE,
46: * PERFORMANCE OR NON-PERFORMANCE OF THE SOFTWARE.
47: *
1.5 ! noro 48: * $OpenXM: OpenXM_contrib2/asir2000/include/inline.h,v 1.4 2000/08/22 05:04:15 noro Exp $
1.3 noro 49: */
1.1 noro 50: #define DMB(base,a1,a2,u,l) (l)=dmb(base,a1,a2,&(u));
51: #define DMAB(base,a1,a2,a3,u,l) (l)=dmab(base,a1,a2,a3,&(u));
52: #define DMAR(a1,a2,a3,d,r) (r)=dmar(a1,a2,a3,d);
53:
54: #define DM27(a1,a2,u,l) (l)=dm_27(a1,a2,&(u));
55: #define DMA27(a1,a2,a3,u,l) (l)=dma_27(a1,a2,a3,&(u));
56: #define DSAB27(base,a1,a2,u,l) (l)=dmab(base,a1,BASE27,a2,&(u));
57:
58: #if defined(__GNUC__) || defined(__alpha) || defined(mips)
59: #define DM(a1,a2,u,l)\
60: {UL _t;\
61: _t=(UL)(a1)*(UL)(a2);\
62: (u)=(unsigned int)(_t>>BSH);\
63: (l)=(unsigned int)(_t&BMASK);}
64:
65: #define DMA(a1,a2,a3,u,l)\
66: {UL _t;\
67: _t=(UL)(a1)*(UL)(a2)+(UL)(a3);\
68: (u)=(unsigned int)(_t>>BSH);\
69: (l)=(unsigned int)(_t&BMASK);}
70:
71: #define DMA2(a1,a2,a3,a4,u,l)\
72: {UL _t;\
73: _t=(UL)(a1)*(UL)(a2)+(UL)(a3)+(UL)(a4);\
74: (u)=(unsigned int)(_t>>BSH);\
75: (l)=(unsigned int)(_t&BMASK);}
76:
77: #define DSAB(base,a1,a2,u,l)\
78: {UL _t;\
79: _t=(((UL)(a1))<<BSH)|((UL)(a2));\
80: (u)=(unsigned int)(_t/((UL)(base)));\
1.2 noro 81: (l)=(unsigned int)(_t-((UL)(base)*(UL)(u)));}
1.1 noro 82: #else
83: #define DM(a1,a2,u,l) (l)=dm(a1,a2,&(u));
84: #define DMA(a1,a2,a3,u,l) (l)=dma(a1,a2,a3,&(u));
85: #define DMA2(a1,a2,a3,a4,u,l) (l)=dma2(a1,a2,a3,a4,&(u));
86: #define DSAB(base,a1,a2,u,l) (l)=dsab(base,a1,a2,&(u));
87: #endif
88:
89: #define DQR(a,b,q,r)\
90: (q)=(a)/(b);\
91: (r)=(a)-(b)*(q);
92:
93: #if defined(sparc)
94: #undef DSAB
95: #undef DSAB27
96:
97: #define DSAB(base,a1,a2,u,l)\
98: {unsigned int _t;\
99: asm volatile("wr %0,%%g0,%%y" : : "r"(a1) );\
100: asm volatile("udiv %1,%2,%0" :"=r"(_t): "r"(a2),"r"(base) );\
101: (l)=(unsigned int)(a2)-(unsigned int)(_t)*(unsigned int)(base);\
102: (u)=(_t);}
103:
104: #define DSAB27(base,a1,a2,u,l) (l)=dsab_27(base,a1,a2,&(u));
105: #endif
106:
107: #if defined(VISUAL)
108:
109: #undef DM
110: #undef DMA
111: #undef DMA2
112: #undef DMB
113: #undef DMAB
114: #undef DMAR
115: #undef DSAB
116: #undef DM27
117: #undef DMA27
118: #undef DSAB27
119:
120: #define DSAB(base,a1,a2,u,l)\
121: {\
122: unsigned int _t1,_t2,_d;\
123: _t1=a1;_t2=a2;_d=base;\
124: __asm\
125: {\
126: __asm mov edx,_t1\
127: __asm mov eax,_t2\
128: __asm div _d\
129: __asm mov _t1,eax\
130: __asm mov _t2,edx\
131: }\
132: u=_t1;l=_t2;\
133: }
134:
135: #define DM(a1,a2,u,l)\
136: {\
137: unsigned int _t1,_t2;\
138: _t1=a1;_t2=a2;\
139: __asm\
140: {\
141: __asm mov eax,_t1\
142: __asm mul _t2\
143: __asm mov _t1,edx\
144: __asm mov _t2,eax\
145: }\
146: u=_t1;l=_t2;\
147: }
148:
149: #define DMA(a1,a2,a3,u,l)\
150: {\
151: unsigned int _t1,_t2,_t3;\
152: _t1=a1;_t2=a2;_t3=a3;\
153: __asm\
154: {\
155: __asm mov eax,_t1\
156: __asm mul _t2\
157: __asm add eax,_t3\
158: __asm adc edx,0\
159: __asm mov _t1,edx\
160: __asm mov _t2,eax\
161: }\
162: u=_t1;l=_t2;\
163: }
164:
165: #define DMA2(a1,a2,a3,a4,u,l)\
166: {\
167: unsigned int _t1,_t2,_t3,_t4;\
168: _t1=a1;_t2=a2;_t3=a3;_t4=a4;\
169: __asm\
170: {\
171: __asm mov eax,_t1\
172: __asm mul _t2\
173: __asm add eax,_t3\
174: __asm adc edx,0\
175: __asm add eax,_t4\
176: __asm adc edx,0\
177: __asm mov _t1,edx\
178: __asm mov _t2,eax\
179: }\
180: u=_t1;l=_t2;\
181: }
182:
183: #define DMB(base,a1,a2,u,l)\
184: {\
185: unsigned int _t1,_t2,_d;\
186: _t1=a1;_t2=a2;_d=base;\
187: __asm\
188: {\
189: __asm mov eax,_t1\
190: __asm mul _t2\
191: __asm div _d\
192: __asm mov _t1,eax\
193: __asm mov _t2,edx\
194: }\
195: u=_t1;l=_t2;\
196: }
197:
198: #define DMAB(base,a1,a2,a3,u,l)\
199: {\
200: unsigned int _t1,_t2,_t3,_d;\
201: _t1=a1;_t2=a2;_t3=a3;_d=base;\
202: __asm\
203: {\
204: __asm mov eax,_t1\
205: __asm mul _t2\
206: __asm add eax,_t3\
207: __asm adc edx,0\
208: __asm div _d\
209: __asm mov _t1,eax\
210: __asm mov _t2,edx\
211: }\
212: u=_t1;l=_t2;\
213: }
214:
215: #define DMAR(a1,a2,a3,d,r)\
216: {\
217: unsigned int _t1,_t2,_t3,_d;\
218: _t1=a1;_t2=a2;_t3=a3,_d=d;\
219: __asm\
220: {\
221: __asm mov eax,_t1\
222: __asm mul _t2\
223: __asm add eax,_t3\
224: __asm adc edx,0\
225: __asm div _d\
226: __asm mov _t1,edx\
227: }\
228: r=_t1;\
229: }
230:
231: #define DSAB27(base,a1,a2,u,l)\
232: {\
233: unsigned int _t1,_t2,_d;\
234: _t1=a1;_t2=a2;_d=base;\
235: __asm\
236: {\
237: __asm mov edx,_t1\
238: __asm mov eax,_t2\
239: __asm mov ecx,edx\
240: __asm shl ecx,27\
241: __asm or eax,ecx\
242: __asm shr edx,5\
243: __asm div _d\
244: __asm mov _t1,eax\
245: __asm mov _t2,edx\
246: }\
247: u=_t1;l=_t2;\
248: }
249:
250: #define DM27(a1,a2,u,l)\
251: {\
252: unsigned int _t1,_t2;\
253: _t1=a1;_t2=a2;\
254: __asm\
255: {\
256: __asm mov eax,_t1\
257: __asm mul _t2\
258: __asm shl edx,5\
259: __asm mov ecx,eax\
260: __asm shr ecx,27\
261: __asm or edx,ecx\
262: __asm and eax,134217727\
263: __asm mov _t1,edx\
264: __asm mov _t2,eax\
265: }\
266: u=_t1;l=_t2;\
267: }
268:
269: #define DMA27(a1,a2,a3,u,l)\
270: {\
271: unsigned int _t1,_t2,_t3;\
272: _t1=a1;_t2=a2;_t3=a3;\
273: __asm\
274: {\
275: __asm mov eax,_t1\
276: __asm mul _t2\
277: __asm add eax,_t3\
278: __asm adc edx,0\
279: __asm shl edx,5\
280: __asm mov ecx,eax\
281: __asm shr ecx,27\
282: __asm or edx,ecx\
283: __asm and eax,134217727\
284: __asm mov _t1,edx\
285: __asm mov _t2,eax\
286: }\
287: u=_t1;l=_t2;\
288: }
289: #endif
290:
291: #if !defined(VISUAL) && defined(i386) && (defined(linux) || defined(__FreeBSD__) || defined(__NetBSD__))
292:
293: #if 0
294: #undef DMA
295: #define DMA(a1,a2,a3,u,l)\
1.5 ! noro 296: asm volatile("movl %0,%%eax" : : "g" (a1) : "ax");\
! 297: asm volatile("mull %0" : : "g" (a2) : "ax","dx");\
! 298: asm volatile("addl %0,%%eax" : : "g" (a3) : "ax" );\
1.1 noro 299: asm volatile("adcl $0,%%edx" : : : "dx" );\
1.5 ! noro 300: asm volatile("movl %%edx,%0" : "=g" (u) : : "ax","dx");\
! 301: asm volatile("movl %%eax,%0" : "=g" (l) : : "ax" );
1.1 noro 302: #endif
303:
304: #undef DM
305: #undef DMB
306: #undef DMAB
307: #undef DMAR
308: #undef DSAB
309: #undef DM27
310: #undef DMA27
311:
312: #define DM27(a1,a2,u,l)\
1.5 ! noro 313: asm volatile(" movl %2,%%eax; mull %3; shll $5,%%edx; movl %%eax,%%ecx; shrl $27,%%ecx; orl %%ecx,%%edx; andl $134217727,%%eax; movl %%edx,%0; movl %%eax,%1" :"=g"(u),"=g"(l) :"g"(a1),"g"(a2) :"ax","bx","cx","dx");
1.1 noro 314:
315: #define DMA27(a1,a2,a3,u,l)\
1.5 ! noro 316: asm volatile(" movl %2,%%eax; mull %3; addl %4,%%eax; adcl $0,%%edx; shll $5,%%edx; movl %%eax,%%ecx; shrl $27,%%ecx; orl %%ecx,%%edx; andl $134217727,%%eax; movl %%edx,%0; movl %%eax,%1" :"=g"(u),"=g"(l) :"g"(a1),"g"(a2),"g"(a3) :"ax","bx","cx","dx");
1.1 noro 317:
318: #define DSAB(base,a1,a2,u,l)\
1.5 ! noro 319: asm volatile(" movl %2,%%edx; movl %3,%%eax; divl %4; movl %%edx,%0; movl %%eax,%1" :"=g"(l),"=g"(u) :"g"(a1),"g"(a2),"g"(base) :"ax","dx");
1.1 noro 320:
321: #define DM(a1,a2,u,l)\
1.5 ! noro 322: asm volatile(" movl %2,%%eax; mull %3; movl %%edx,%0; movl %%eax,%1" :"=g"(u),"=g"(l) :"g"(a1),"g"(a2) :"ax","dx");
1.1 noro 323:
324: #define DMB(base,a1,a2,u,l)\
1.5 ! noro 325: asm volatile(" movl %2,%%eax;" mull %3;" divl %4;" movl %%edx,%0;" movl %%eax,%0" :"=g"(l),"=g"(u) :"g"(a1),"g"(a2),"g"(base) :"ax","dx");
1.1 noro 326:
327: #define DMAB(base,a1,a2,a3,u,l)\
1.5 ! noro 328: asm volatile("movl %2,%%eax; mull %3; addl %4,%%eax; adcl $0,%%edx; divl %5; movl %%edx,%0; movl %%eax,%1" :"=g"(l),"=g"(u) :"g"(a1),"g"(a2),"g"(a3),"g"(base) :"ax","dx");
1.1 noro 329:
330: #define DMAR(a1,a2,a3,d,r)\
1.5 ! noro 331: asm volatile("movl %1,%%eax; mull %2; addl %3,%%eax; adcl $0,%%edx; divl %4; movl %%edx,%0" :"=g"(r) :"g"(a1),"g"(a2),"g"(a3),"g"(d) :"ax","dx");
1.1 noro 332: #endif
333:
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