Annotation of OpenXM_contrib2/asir2018/builtin/list.c, Revision 1.2
1.1 noro 1: /*
2: * Copyright (c) 1994-2000 FUJITSU LABORATORIES LIMITED
3: * All rights reserved.
4: *
5: * FUJITSU LABORATORIES LIMITED ("FLL") hereby grants you a limited,
6: * non-exclusive and royalty-free license to use, copy, modify and
7: * redistribute, solely for non-commercial and non-profit purposes, the
8: * computer program, "Risa/Asir" ("SOFTWARE"), subject to the terms and
9: * conditions of this Agreement. For the avoidance of doubt, you acquire
10: * only a limited right to use the SOFTWARE hereunder, and FLL or any
11: * third party developer retains all rights, including but not limited to
12: * copyrights, in and to the SOFTWARE.
13: *
14: * (1) FLL does not grant you a license in any way for commercial
15: * purposes. You may use the SOFTWARE only for non-commercial and
16: * non-profit purposes only, such as academic, research and internal
17: * business use.
18: * (2) The SOFTWARE is protected by the Copyright Law of Japan and
19: * international copyright treaties. If you make copies of the SOFTWARE,
20: * with or without modification, as permitted hereunder, you shall affix
21: * to all such copies of the SOFTWARE the above copyright notice.
22: * (3) An explicit reference to this SOFTWARE and its copyright owner
23: * shall be made on your publication or presentation in any form of the
24: * results obtained by use of the SOFTWARE.
25: * (4) In the event that you modify the SOFTWARE, you shall notify FLL by
26: * e-mail at risa-admin@sec.flab.fujitsu.co.jp of the detailed specification
27: * for such modification or the source code of the modified part of the
28: * SOFTWARE.
29: *
30: * THE SOFTWARE IS PROVIDED AS IS WITHOUT ANY WARRANTY OF ANY KIND. FLL
31: * MAKES ABSOLUTELY NO WARRANTIES, EXPRESSED, IMPLIED OR STATUTORY, AND
32: * EXPRESSLY DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS
33: * FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF THIRD PARTIES'
34: * RIGHTS. NO FLL DEALER, AGENT, EMPLOYEES IS AUTHORIZED TO MAKE ANY
35: * MODIFICATIONS, EXTENSIONS, OR ADDITIONS TO THIS WARRANTY.
36: * UNDER NO CIRCUMSTANCES AND UNDER NO LEGAL THEORY, TORT, CONTRACT,
37: * OR OTHERWISE, SHALL FLL BE LIABLE TO YOU OR ANY OTHER PERSON FOR ANY
38: * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, PUNITIVE OR CONSEQUENTIAL
39: * DAMAGES OF ANY CHARACTER, INCLUDING, WITHOUT LIMITATION, DAMAGES
40: * ARISING OUT OF OR RELATING TO THE SOFTWARE OR THIS AGREEMENT, DAMAGES
41: * FOR LOSS OF GOODWILL, WORK STOPPAGE, OR LOSS OF DATA, OR FOR ANY
42: * DAMAGES, EVEN IF FLL SHALL HAVE BEEN INFORMED OF THE POSSIBILITY OF
43: * SUCH DAMAGES, OR FOR ANY CLAIM BY ANY OTHER PARTY. EVEN IF A PART
44: * OF THE SOFTWARE HAS BEEN DEVELOPED BY A THIRD PARTY, THE THIRD PARTY
45: * DEVELOPER SHALL HAVE NO LIABILITY IN CONNECTION WITH THE USE,
46: * PERFORMANCE OR NON-PERFORMANCE OF THE SOFTWARE.
47: *
1.2 ! noro 48: * $OpenXM: OpenXM_contrib2/asir2018/builtin/list.c,v 1.1 2018/09/19 05:45:06 noro Exp $
1.1 noro 49: */
50: #include "ca.h"
51: #include "parse.h"
52:
53: void Pcar(), Pcdr(), Pcons(), Pappend(), Preverse(), Plength();
54: void Plist(), Passoc(), Pcadr(), Pcddr();
55: void Pnconc(), Preplcd(), Preplca();
56:
57: struct ftab list_tab[] = {
58: {"car",Pcar,1},
59: {"cdr",Pcdr,1},
60: {"cons",Pcons,2},
61: {"append",Pappend,2},
62: {"reverse",Preverse,1},
63: {"length",Plength,1},
64: {"nconc",Pnconc,2},
65: {"replcd",Preplcd,2},
66: {"replca",Preplca,2},
67: {"list", Plist, -99999999},
68: {"assoc",Passoc,2},
69: {"cddr",Pcddr,1},
70: {"cadr",Pcadr,1},
71: {0,0,0},
72: };
73:
74: void Pcar(arg,rp)
75: NODE arg;
76: pointer *rp;
77: {
78: asir_assert(ARG0(arg),O_LIST,"car");
79: if ( !BDY((LIST)ARG0(arg)) )
80: *rp = ARG0(arg);
81: else
82: *rp = (pointer)BDY(BDY((LIST)ARG0(arg)));
83: }
84:
85: void Pcdr(arg,rp)
86: NODE arg;
87: LIST *rp;
88: {
89: asir_assert(ARG0(arg),O_LIST,"cdr");
90: if ( !BDY((LIST)ARG0(arg)) )
91: *rp = (LIST)ARG0(arg);
92: else
93: MKLIST(*rp,NEXT(BDY((LIST)ARG0(arg))));
94: }
95:
96: void Pcddr(arg,rp)
97: NODE arg;
98: LIST *rp;
99: {
100: NODE n;
101: asir_assert(ARG0(arg),O_LIST,"cddr");
102: if ( !BDY((LIST)ARG0(arg)) ) {
103: *rp = (LIST)ARG0(arg);
104: }else {
105: n = NEXT(BDY((LIST)ARG0(arg)));
106: if ( n ) {
107: n = NEXT(n);
108: }
109: MKLIST(*rp,n);
110: }
111: }
112:
113: void Pcadr(arg,rp)
114: NODE arg;
115: pointer *rp;
116: {
117: NODE n;
118: LIST t;
119: asir_assert(ARG0(arg),O_LIST,"cadr");
120: if ( !BDY((LIST)ARG0(arg)) ) {
121: *rp = ARG0(arg);
122: }else {
123: n = NEXT(BDY((LIST)ARG0(arg)));
124: if ( n ) {
125: *rp = (pointer)BDY(n);
126: }else {
127: MKLIST(t,n);
128: *rp = t;
129: }
130: }
131: }
132:
133: void Pcons(arg,rp)
134: NODE arg;
135: LIST *rp;
136: {
137: NODE t;
138:
139: asir_assert(ARG1(arg),O_LIST,"cons");
140: MKNODE(t,ARG0(arg),BDY((LIST)ARG1(arg))); MKLIST(*rp,t);
141: }
142:
143: void Pappend(arg,rp)
144: NODE arg;
145: LIST *rp;
146: {
147: NODE t,t0,n;
148:
149: asir_assert(ARG0(arg),O_LIST,"append");
150: asir_assert(ARG1(arg),O_LIST,"append");
151: if ( !(n = BDY((LIST)ARG0(arg))) )
152: *rp = (LIST)ARG1(arg);
153: else {
154: for ( t0 = 0; n; n = NEXT(n) ) {
155: NEXTNODE(t0,t); BDY(t) = BDY(n);
156: }
157: NEXT(t) = BDY((LIST)ARG1(arg));
158: MKLIST(*rp,t0);
159: }
160: }
161:
162: void Preverse(arg,rp)
163: NODE arg;
164: LIST *rp;
165: {
166: NODE t,t1,n;
167:
168: asir_assert(ARG0(arg),O_LIST,"reverse");
169: if ( !(n = BDY((LIST)ARG0(arg))) )
170: *rp = (LIST)ARG0(arg);
171: else {
172: for ( t = 0; n; n = NEXT(n) ) {
173: MKNODE(t1,BDY(n),t); t = t1;
174: }
175: MKLIST(*rp,t);
176: }
177: }
178:
179: void Plength(NODE arg,Z *rp)
180: {
181: NODE n;
182: int i;
183:
184: switch (OID(ARG0(arg))) {
185: case O_VECT:
186: i = ((VECT)ARG0(arg))->len;
187: break;
188: case O_LIST:
189: n = BDY((LIST)ARG0(arg));
190: for ( i = 0; n; i++, n = NEXT(n) );
191: break;
192: case O_BYTEARRAY:
193: i = ((BYTEARRAY)ARG0(arg))->len;
194: break;
195: default:
196: error("length : invalid argument"); break;
197: }
1.2 ! noro 198: STOZ(i,*rp);
1.1 noro 199: }
200:
201: void Plist(NODE arg, LIST *rp)
202: {
203: MKLIST(*rp,arg);
204: }
205:
206: void Pnconc(NODE arg,LIST *rp)
207: {
208: NODE a1,a2,n;
209:
210: asir_assert(ARG0(arg),O_LIST,"nconc");
211: asir_assert(ARG1(arg),O_LIST,"nconc");
212: a1 = BDY((LIST)ARG0(arg));
213: if ( !a1 )
214: *rp = (LIST)ARG1(arg);
215: else {
216: for ( n = a1; n; n = NEXT(n) ) {
217: a2 = n;
218: }
219: NEXT(a2) = BDY((LIST)ARG1(arg));
220: *rp = (LIST)ARG0(arg);
221: }
222: }
223:
224: void Preplcd(NODE arg,LIST *rp)
225: {
226: NODE a0,a1;
227:
228: asir_assert(ARG0(arg),O_LIST,"replcd");
229: asir_assert(ARG1(arg),O_LIST,"replcd");
230: a0 = BDY((LIST)ARG0(arg));
231: if ( !a0 )
232: *rp = (LIST)ARG0(arg);
233: else {
234: NEXT(a0) = BDY((LIST)ARG1(arg));
235: *rp = (LIST)ARG0(arg);
236: }
237: }
238:
239: void Preplca(NODE arg,LIST *rp)
240: {
241: NODE n;
242:
243: asir_assert(ARG0(arg),O_LIST,"replca");
244: if ( !(n = BDY((LIST)ARG0(arg)) ) )
245: *rp = (LIST)ARG0(arg);
246: else {
247: BDY(BDY((LIST)ARG0(arg))) = (LIST)ARG1(arg);
248: *rp = (LIST)ARG0(arg);
249: }
250: }
251:
252: void Passoc(NODE arg, LIST *rp)
253: {
254: NODE s,n,m,s1,t1,t2;
255: LIST t;
256:
257: asir_assert(ARG0(arg),O_LIST,"assoc");
258: asir_assert(ARG1(arg),O_LIST,"assoc");
259: n = BDY((LIST)ARG0(arg));
260: m = BDY((LIST)ARG1(arg));
261: for ( s = 0, t2 = 0; n; n = NEXT(n) ) {
262: if (m) {
263: MKNODE(t2,BDY(m),0);
264: m = NEXT(m);
265: }
266: MKNODE(t1,BDY(n),t2); MKLIST(t,t1);
267: NEXTNODE(s,s1); BDY(s1) = t; NEXT(s1) = 0;
268: }
269: MKLIST(*rp,s);
270: }
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